In apparatus such as microprocessors and other digital processors, a central processing unit (CPU) is utilized for the processing operations. The CPU includes an on-chip register set which is utilized by the CPU during both normal operation and exception processing, in a manner well known to those skilled in the art. Whenever any prior operation is interrupted by an exception process such as an interrupt operation, there is a recursion jeopardy problem because the interrupt processing program will use the same registers and may change some of the values therein. The conventional solution to the problem is to save in a memory (also referred to as "stacking") the current values of some or all of the registers prior to beginning the processing of the interrupt and reading those saved values back into the registers from memory (also referred to as "unstacking") when interrupt processing is complete. This solution is time consuming and requires relatively extensive software support. However, this solution is theoretically capable of handling an unlimited number of "nested" interrupts (i.e.: interrupts which interrupt other interrupt programs).
Some microprocessors provide several, alternate on-chip register sets (also known as register banks) for use during interrupt processing. An interrupt program simply uses a different set of registers than was being used by the interrupted program, thus avoiding the need to stack the register contents. This approach is very costly in terms of the silicon area when the problem of nested interrupts is considered. Duplicating all the necessary registers in order to permit a reasonable number of nested interrupts may well require an unreasonable number of registers.
Further, some mechanism must be provided, even in a machine having multiple register banks, to determine when all banks are in use (when recurssion jeopardy exists) and to provide some solution to the problem.